Frequently Asked Questions

Select a FOA to view questions and answers for the specific funding opportunity. Alternatively select "Non-FOA related items" to view system FAQ items.

Question 1: Since you are only projecting one award, do you already have an applicant identified for this program?  Is there a geographical location preference for this program?  Can the 50% match requirement be in-kind and cash – if so, what percentage should be cash vs in-kind?
Answer 1: Please see Section III.A of the FOA for information regarding eligible applicants.  The FOA does not specify a location preference; however,  see Section II.I of the FOA, ‘Performance of Work in the United States.’ Please see Section III.B and Appendix C of the FOA for cost share requirements.
Question 2: Does only the Prime Applicant submit a Letter of Intent?
Answer 2: Yes.
Question 3: If a team member is not listed on the Prime Applicant's Letter of Intent may he still be included in the full application?
Answer 3: Yes.
Question 4: At the bottom of p. 13 and the top of p. 14 of the FOA, the following two sentences occur: "An institute and its members will need to be well integrated across the supply chain (Figure 2) to ensure wafers demonstrating the current state-of-the-art growth technologies are utilized in its device design, fabrication, and testing activities. However, materials growth or wafer processing improvements (i.e. defect density reduction, film thickness, yield, and diameter increases) are excluded from the scope of this FOA and the Institute's purpose." We would like to get some clarification on these two sentences, particularly the second, as it has been the source of some confusion. First we should briefly describe our understanding of some term definitions. Normally, power devices are fabricated during a series of processing steps — including photolithography, gate dielectric deposition, etching, gate metallization, implantation, contact metallization, etc. -- that are each performed on the entire wafer. In common usage the term "wafer processing" refers to these steps. Individual devices can sometimes fail to undergo a processing step successfully; the percentage of devices which successfully undergo a given processing step is termed the "yield" for that step, and determine how robust and reliable the process is. (Metrology is used to help determine processing failure modes, and to increase yield. Increases in yield result in reductions in cost, which increase economic competitiveness.) When the processing of the wafer is complete, the individual power devices are diced out and then packaged. A face-value interpretation of the second FOA sentence above would hold that the Institute should not work on improving wafer processing, or on increasing the yield of the processing steps involved in the fabrication of the power devices. In that case, only the dicing and packaging would be left as suitable topics for investigation. The development of new device architectures, requiring for example new gate dielectrics, different contact metals, different heteroepitaxy layers, etc. would thus be "excluded from the scope of this FOA." This would seem inconsistent with EERE's intent for the Institute, as described in other sections of the FOA. A second, alternative interpretation, garnered from the context, is that the second sentence intends primarily to eliminate substrate research, but used the terms "wafer processing" and "yield" in an unconventional manner. This alternative interpretation is that growing boules of SiC, or performing synthesis of GaN substrates, are indeed beyond the scope of the institute. However, the growth of heteroepitaxial layers of active device material, the deposition of gate dielectric material, the exploration of alternative contact metal materials, etc. all remain legitimate topics for innovation. Similarly this interpretation would hold that the various wafer processing steps required to produce a functioning WBG power device — and the yield of those steps — are also legitimate topics for investigation and innovation within the scope of the Institute's activities. Can you please comment on this discussion. And in particular, can you say which of the two interpretations are correct?
Answer 4:

The correct interpretation is the second because wafer processing is discussed within the context of materials growth, and specifically, defect density reduction, film thickness, yield, and diameter increases.  Therefore, the interpretation that within this context substrate research is eliminated from the scope of this FOA, including as the questioner notes, SiC boule growth and GaN substrate synthesis, is correct.  However, while the deposition of new gate dielectrics and alternative contact metals might be considered within the context of new and improved device designs and architectures, heteroepitaxial growth is not.  Therefore, both substrate and epitaxial growth (including both heteroepitaxy and homoepitaxy) improvements are excluded from the scope of this FOA.

Question 5: While FOA #683 for a "Clean Energy Manufacturing Innovation Institute" alludes to a manufacturing capability, clarification as to whether this requires device fabrication (and cleanroom) tools and capability would be helpful.  Would a proposal to this FOA which did NOT include a cleanroom facility, but made use of multiple, already established WBG power diode and switch products also be given strong consideration?  This might include device reliability, device testing facilities as well as application studies, and the use of multiple GaN and multiple SiC products that have already been qualified and made available for sale.  Please comment.
Answer 5: Proposals should include device fabrication (and cleanroom) tools and capability.  These tools and capabilities could be performed, as noted in the FOA on Page 13, in “…idle Si foundry lines utilized for the wafer sizes (6-inch and 8-inch) required to pursue WBG-based device maturation efforts.”  The use of multiple, already established WBG power diode and switch products (that include device reliability, device testing facilities, as well as application studies and the use of multiple GaN and multiple SiC products that have already been qualified and available for sale) can be added and considered for the Institute as long as it is in addition to device fabrication tools and capabilities.
Question 6: Following on question and answer 5 (regarding the inclusion of semiconductor foundry capability), the FOA states, " ... a strong technical focus on GaN- and/or SiC-based device manufacturing ... " on page 13.  Please clarify if a winning proposal must include foundry capability for GaN devices AND foundry capability for SiC devices, or if a successful proposal may include foundry capability for only one of those two technologies.  In the latter case, it could be presumed that test and evaluation of existing products of both technologies would be included.
Answer 6: Page 13 of the FOA states “Institute must possess a strong technical focus on GaN- and/or SiC-based device manufacturing."  Applicants can either include manufacturing capability for both GaN and SiC devices or manufacturing capability for only one of the two technologies at their discretion depending on the scope of the proposal.  Testing and evaluation of existing products of both technologies can be included.
Question 7: Does DOE AMO FOA #683 for a "Clean Manufacturing Innovation Institute" require a physical location that fabricates semiconductor devices (where wafers are made into switches)?
Answer 7: Please refer to Section I.C, "The focus of an Institute….will require circuit design, packaging, and module manufacturing capabilities as well as wafer test metrology equipment to verify wafer quality throughout the photolithographic and chemical processing steps…an institute should offer in-house design capabilities for users, as well as common fabrication and testing equipment…" 
Question 8: The DOE AMO FOA #683 for a "Clean Manufacturing Innovation Institute" alludes to a shared infrastructure with specific interest in WBG device fabrication capability. Can you clarify what is meant by shared infrastructure resources? A previous question and answer clarified that "proposals should include device fabrication (and cleanroom) tools and capability." If a proposal team provides a WBG device fabrication facility, does it need to be open to any domestic company to utilize? If so, under what parameters (free use, pay for services)? What if the device fabrication is only utilized for a select industry team to work on application-based research for a specific power electronics product (e.g., inverters for aircraft)?
Answer 8: As noted in Section I. D. of the FOA, the goals of the Institute include to "…support shared RD&D infrastructure that enables affordable access to physical and virtual tools," and "…enable applied RD&D projects that support new processes, equipment, design tools, and capabilities for innovative production or materials technologies…"  Furthermore, capabilities should be provided "…for and collaboration in open, pre-competitive work, among multiple parties in an Intellectual Property (IP) protected environment, as well as proprietary activities as appropriate to engage stakeholders as relevant to the technology area…"  Pursuant to Merit Review Criteria 3, Approach and Management Plan (Section V. A. 2), an applicant will have to propose the necessary parameters needed for use of the Institute by entities that meet both the proposed Institute objectives and the goals identified in the FOA.  Pursuant to Merit Review Criteria 1, Objectives and Impact to U.S. Manufacturing  (Section V. A. 2), the Institute's manufacturing capabilities should be utilized in such a way that meets the goals of the Institute for broadly applicable and pervasive impact across multiple industries and markets utilizing power electronics in clean energy applications.
Question 9: As noted in the FOA (p. 12), lack of cost parity with Si is a substantial barrier to large scale market adoption of WBG technologies.  Today, 90% of the IP and 75% of the cost of goods sold is located in the substrate for both SiC and GaN/Si. There is little incentive for a foundry to commercialize SiC and GaN/Si with the existing cost structure, as the processing value add is small. Overall cost reductions in these technologies will not occur without significant reduction in base materials costs for WBG substrates and epitaxy. In a pre-competitive Institute, individual participants/clients could build substantial IP in the materials technology area, specifically the epitaxial solution.  If state-of-the-art materials growth/modifications were a core competency of the Institute, there could be a win-win for the Institute and its participants: the Institute could develop an income/revenue stream by offering  use of its tools and expertise on a fee basis and clients could develop their own unique solutions and differentiate them for the marketplace. To achieve these benefits, materials should be included in the scope of work for the Institute.  Does this FOA truly intend to exclude materials work? (p. 14).
Answer 9: As noted in Section I. D., the goal of this FOA and available funding is “to overcome key manufacturing and cost barriers in mid-stream device…elements of the supply chain.”  Materials growth (substrate and epitaxy) developments are therefore excluded from the scope of this FOA, as noted in Section I.C.  However, pursuant to Section I.C, “an Institute and its members will need to be well integrated across the supply chain to ensure wafers demonstrating the current state-of-the-art growth technologies are utilized in its device design, fabrication, and testing activities.”  Therefore, while funding for this FOA excludes WBG substrates and epitaxy pursuant with the goals of the Institute, materials (substrate and epitaxy) manufacturers are not excluded from membership in the Institute in order to supply materials demonstrating the latest growth advances made through other funding solicitations and sources to the device and power component manufacturing activities of the Institute.
Question 10: It is implied within the FOA that the Institute support both 150mm SiC and 200mm GaN/Si within the same physical asset. This is certainly implied within the FOA, and these form factors make the most economic sense for high volume manufacturing in 3-5 years. Is one facility the intent?  The cost of supporting 150mm and 200mm pilot manufacturing lines will be larger than the funding opportunity outlined in the FOA. For GaN/Si, integration of standard silicon control libraries is desirable from a market perspective. This adds substantial cost to the Institute for support of sub 350nm silicon CMOS baseline technology. Is the intent of this FOA for discrete device technology only, or the integration of silicon control logic with the WBG power components?
Answer 10: Page 13 of the FOA states that an “Institute must possess a strong technical focus on GaN- and/or SiC-based device manufacturing.”  Applicants do not need to propose both GaN and Sic, but can if they choose, depending on the extent the applicant proposes to focus on discrete device technology and the degree to which applicants choose to include power component integration and system testing.  While discrete device technology, for either GaN, SiC, or both, pursuant to Section I.C, is part of the intent of this FOA, it does not need to be the sole focus of the Institute, and can also include integration of silicon control logic with the WBG power components.
Question 11: Emphasis in the FOA appears to be on motor drives, renewable energy, smart grid, while early market adoption of GaN on SiC and GaN on Si has been for high power RF applications, radar and RF base stations. Are RF applications of GaN technologies excluded from market consideration in power electronics?  Will any application of GaN or SiC that has demonstrated system level energy savings be included for consideration within the Institute?
Answer 11: The focus of this WBG semiconductor device Institute is in power electronic applications, due to not only their system level energy savings, but also, as noted in Section I.C and Figure 2, broad applicability and pervasiveness across the EERE portfolio (i.e. industrial motors, electric drive vehicles, renewable grid interface and integrations, etc.).  Pursuant to Merit Review Criteria 1, Objectives and Impact to U.S. Manufacturing (Section V.A.2), the Institute should be utilized in such a way that meets the goals of the Institute for broadly applicable and pervasive impact across multiple industries and markets utilizing power electronics in clean energy applications.  While RF applications are not explicitly excluded, the focus for this Institute is on applications and markets directly applicable to power technologies meeting the priorities, needs and objectives of the EERE Technology Offices (i.e. lower frequency electric power conversion including but not limited to systems identified in Figure 2).
Question 12: Defining transformational market concepts requires all members of the product supply chain to align from component to systems level.  The timeframes established in this FOA leave little  time for this supply chain alignment, in particular with regard to engagement of SME, OEM, and IDM organizations. Is there an existing or preferred candidate/business model that the DOE is searching for?  Is this FOA targeted to support secondary markets and provide a workforce trained in WBG technology?
Answer 12: One of the goals of the FOA (Section I.D.) is to establish an Institute that has “clear policies and strategies for participation by a wide range of stakeholders in the Institute, in particular, to engage SMEs through outreach and intermediaries, including programs like the NIST MEP Center network where appropriate, and provide sufficient financial and contractual mechanisms for all stakeholders along the supply chain including end-users to benefit from the Institute resources.” A tiered membership structure, fee-for service, consortia based model, etc. are examples among many that could be used to operate the Institute. It is up to the applicant to define the operating structure that will best support the goals of the FOA. Section V.A. under Criteria 3 states the relevant merit review criteria related to this question. “Extent to which the proposed operations structure will support the goals of the FOA and objectives of the Institute and incentivize private sector participation.”  Another major objective of the FOA is to establish an Institute that has (Section I.D) “a technical education and workforce development plan to support technical and career education that will leverage relevant existing resources like the NSF ATE Centers, industry validated certifications and apprenticeship programs, etc. to develop the workforce needed to serve in our nation’s high value, next generation manufacturing facilities, as appropriate to the technology area.”
Question 13: Could you please send me contact information for the best person to talk to about detailed questions regarding the funding match portion of the DOE application.
Answer 13: As indicated in Section VII A. of the FOA, all questions must be submitted to the mailbox.  
Question 14: Are applications that include organizations from different states eligible as partners on an application with combined funding efforts or is the funding required to come from one state/region only?
Answer 14: Please refer to Section III of the FOA for eligibility information.
Question 15: In the notification of Modification 1, why is the "cost sharing or matching requirement" marked "No" ("No" is also highlighted)?
Answer 15: There was a technical data transfer issue which temporarily caused the notice to reflect a no cost sharing requirement.  The notice has now been corrected to indicate that there is a cost sharing requirement, as specified in the FOA.  Please refer to Section III B. of the FOA for cost sharing requirements.
Question 16: Our PI is preparing to submit an LOI in response to DE-FOA-0000683, U.S. DOE, Clean Energy Manufacturing Innovation Institute, and I would like to confirm that an Authorized Organizational Representative (AOR) signature is NOT necessary when submitting the LOI therefore, the PI would register on the Exchange and self-submit their LOI. Please confirm.
Answer 16: The FOA does not require that the Letter of Intent be signed.
Question 17: As it concerns the full application, and since there is the inclusion of the SF424 form,  I assume that an AOR will need to respond to the Reps and Certs and officially submit the application. Transfer of the application from the PI to the  AOR is accomplished by the PI SHARING the online application with their AOR. Please confirm.
Answer 17: For information on who can submit an application, sharing application documents, etc., please refer to the  EERE eXCHANGE User Guide at
Question 18: We've noted a discrepancy in the particular SF-424A form requested by the DOE for the FOA-0000683. The form provided on the DE-EERE Exchange site, with the FOA ( is different than the one referenced by the FOA, particularly Section IV. C. 5. and 7 ( Please clarify which SF424 form should be used.
Answer 18: Use of either version is acceptable. The SF 424A on the Exchange site was modified to include four budget periods, since DOE has indicated in Section II. F. of the FOA that this is the anticipated Period of Performance.  The intent was to make it easier for applicants to use a 424A that was already formatted with the correct Budget Period information.
Question 19: In your FOA #683 solicitation, you repeatedly refer to "GaN-based" and "SiC-based" devices. I would like clarify the scope of the meaning of "GaN-based". Given that the FOA precludes substrate and epitaxial development work, could a proposal include the commercial procurement and use of commercially available GaN-on-Other substrates such as GaN-on-GaN or GaN-on-Diamond substrates. In other words, the proposal would not carry out substrate or epitaxial development work, but the proposing team would buy a commercially available next-generation wafer from the open market (e.g. GaN-on-GaN or GaN-on-Diamond). Is this allowed for this FOA? However highly beneficial to the FOA's mission these GaN-on-Other substrates may be (even at the system level), they are widely considered non-traditional and a lot younger in their lifetime development compared to GaN/SiC or GaN/Silicon.
Answer 19: As noted in Section I.C, while substrate and epitaxy development are excluded from the scope of this FOA, "an Institute and its members will need to be well integrated across the supply chain to ensure wafers demonstrating the current state-of-the-art growth technologies are utilized in its device design, fabrication, and testing activities."  Therefore, while members of an Institute could utilize commercially available GaN-on-other substrates that are deemed mature enough in their lifetime development for utilization in the device manufacturing development efforts undertaken by the Institute, funding for this FOA is for device- and module-level manufacturing efforts and not substrate procurement. 
Question 20: Are there requirements on who you can rent your facility from?
Answer 20: There are no requirements in the FOA regarding facility rental.
Question 21: Our organization is being proposed as a subcontractor under DE-FOA-0000683.  Due to the business sensitive information in our cost detail, we request permission to direct submit our budget information to DOE.
Answer 21: It will be acceptable to submit this information directly to the mailbox prior to the Full Application Deadline.  Please ensure that the Prime Recipient’s control number issued by Exchange is listed on these budget documents. However, please note that budget amounts for subcontractors still need to be reflected in the Prime Recipient’s budget. The Prime Recipient’s budget need not contain any business sensitive information from a subcontractor.   
Question 22: Question:  Our question relates to funding for materials growth and wafer processing. We understand the use of funds to support solving materials growth and wafer processing improvements is not allow (as addressed in question 4 and 9 of the FAQ page) … however there are commercial and economic reasons why we would want to deploy funds and resources to ensure that the beginning of our supply chain (wafer processing and materials growth i.e. EPI) is healthy and is capable of supporting future production demands. Is the use of funding to support front-end suppliers for these purposes allowable?
Answer 22:

Response:  As noted in Section I.B and the Merit Review Criterion Discussion in the Project Narrative guidance (Section IV.C.3), an Institute should enable and support "applied, research, development and demonstration projects."  As such, the purpose of government funding for this Institute, as noted in the FOA goals, is to address device and module fabrication barriers and solve these challenges.  As noted in Section I.C, an Institute will need to be well integrated across the supply chain with participation and contributions from both wafer and epitaxy manufacturers and suppliers in a form consistent with and articulated in a proposal's Approach and Management Plan (i.e. Operating Model) as referred to in Section IV.C.3, and consistent with the FOA goals, allocated resources, additional funding streams, and means of support.

Question 23: I would like to clarify the total allowable cost of the Clean Energy Manufacturing Innovation Institute. Since recipient cost share must be at least 50% of the total allowable costs of the proposal, how much is the total allowable cost? If DOE funds $70 million and the recipient provides $35 million, then the total allowable cost is $105 million. If the total allowable cost is the sum of the request budget plus the recipient cost share budget, then the total allowable cost is $140 million. Can you please clarify which of these is correct?
Answer 23: DOE anticipates that this award will be up to $70 million of federal funds for the total project period of five years.  Non-federal share is calculated as a percentage of the Total Project Cost.  If the DOE share is $70 million, the minimum cost share required is $70 million.  See Appendix C for more information regarding how to calculate cost share.
Question 24: How this program treats the independent effort inventions which carried out with proposed prime applicant’s project, but these inventions (patents and pending patents) created under independent effort before this FOA? If this FOA funding allows giving some compensation to the invention owner, then what percentage of estimated total program funding will be appropriated to put in the SF 424A-Excel, PMC 123.1_Detailed_ Budget Justification_File-Excel and Budget Summery?
Answer 24: Please refer to Sections VIII K–N of the FOA for a detailed discussion of patents and inventions.  DOE cannot give specific guidance regarding the formulation of budgets by applicants. It is up to each applicant to develop a budget based on the criteria specified in the FOA and applicable cost principles.
Question 25: I would like to clarify differences between Budget Summery (Appendix 2), SF 424A-Excel and PMC 123.1_Detailed_Budget Justification file-Excel. It deemed that Budget Summery is for overall distributing the dollar amount for DOE portion and the proposed Institute portion, in another words, the budget Summery should set up dollar amounts of estimated total program funding for DOE and the proposed Institute respectively, is this correct? It deemed that the SF 424A-Excel and PMC 123.1_Detailed_Budget Justification File-Excel are for proposed Institute’s budget which means that the budget dollar amount is limited to the portion of the proposed Institute, is this correct?
Answer 25: Please refer to Section IV D. of the FOA for a discussion of the required format for the SF 424A and PMC 123.1.  In general, the PMC 123.1 provides a detailed justification for the numbers presented in the SF 424A.  The numbers must be consistent between both forms.
Question 26: The PMC 123_1_Detailed_Budget_Justification_ File-Excel shown budget cost for FFRDC under Contractual item “f”, it is not clear what percentage of estimated total program funding will be appropriated for FFRDC involvement/contract to the proposed Institute R&D? What is the requirement for having contract with FFRDC?
Answer 26: Please refer to Section III C. of the FOA for a discussion of FFRDC involvement in the proposed project.  FFRDC’s may be proposed as a team member on another entity’s application; however, FFRDC involvement is not required.
Question 27: We are working on the final documents for the subject FOA, we have many sub-recipients. Some of the sub-recipients plan to sub-contract to another party. However from the instructions I’m not clear if we should only be submitting the first layer of PMC123 & SF424A for sub-recipients from the submitting organization. For example: company A will sub to company B, company B will sub to company C. Does company C budget forms need to be included in the full submission? Can you please let me know if budget forms are necessary for a third layer subcontractor?
Answer 27: As indicated in Section IV C. of the FOA, a separate budget is  required for each subrecipient that is expected to perform work estimated to be more than $100,000 or 50% of the total work effort (whichever is less).  This requirement would apply to a subrecipient at any tier level.  
Question 28: Could you please tell me to whom the CO authorization letter should be addressed for the subject FOA?
Answer 28: Please address the CO Authorization to Tina Kouch, 1617 Cole Boulevard, Golden, CO  80401-3393.